A Self-Supervised and Cross-Design Netlist Power Model for Time-Based Layout Power Analysis

Hi! I’m Wenji Fang (方闻绩), a Ph.D. candidate at the Electronic and Computer Engineering Department of the Hong Kong University of Science and Technology, advised by Prof. Zhiyao Xie. Previously, I received my M.Phil in microelectronics from the Hong Kong University of Science and Technology (Guangzhou), advised by Prof. Hongce Zhang & Prof. Zhiyao Xie, and my B.Eng in electrical engineering from Nanjing University of Aeronautics and Astronautics.

My research focuses on AI for Electronic Design Automation (EDA), with the goal of advancing AI-driven paradigms for VLSI design and verification. I have published 10+ first-author papers in leading EDA and AI venues, including DAC, ICCAD, ASP-DAC, TCAD, and ICLR.

I received the inaugural LLM-Aided Design Fellowship and the 2nd Place Award in the ACM SIGDA Student Research Competition. Beyond academia, I have gained industry experience through my internship at NVIDIA Research and Peng Cheng Laboratory.